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A Programmable Device (PROM) is
a)programmable OR & fixed AND array
b)programmable AND & fixed OR array
c)programmable OR & programmable AND array
d)none
which 1 of the above 4 is correct?
In asynchronous ckt, which of the foll. best explain a dynamic hazard
a)o/p changes several times for a single change in i/p
b)o/p changes to a different state for a single change in i/p
c)o/p changes momentarily when it is supposed to remain constant for a single change in i/p
D)none
Interrupt latency is the time elapsed between which of foll?
A)Occurance of an interrupt & its detection by the CPU
b)Assertion of an interrupt & the start of the associated ISR
C)Assertion of an interrupt & the completion of the associated ISR
d)start & completion associated ISR
please reply
Which one of the foll. is the lowest level of abstraction for representation of a digital system?
a)VHDL/verilog
b)GDS-II
c)Gate level netlist
d) System C
How many no. of nmos and pmos transistor are require, for xor logic gate implementation?
a)2 nmos And 2pmos
b)3 nmos And 3pmos
c)6 nmos And 6pmos
d)8 nmos And 8pmos ?
I am confused, please tell right answer....
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