Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by urgentor

  1. U

    Does propagation delay of the system decide the frequency of the system?

    Re: Propagation Delay I guess you're talking about the max freq of a board, not of a chip. For a board, if the clocking scheme is system synchronous, the propagation delay(accurately, flight time) determines the max freq of your board; while if the clocking scheme is source synchronized, by...
  2. U

    How to overcome setup time violation?

    ff setup high violation First let the tools synthesize the design with higher effort, if it doesn't work you'll have to go back to modify your RTL code. To break the worst path into 2 parts by inserting a FF in the middle, or, just latch some signal before using it if the it's ok with your logic.

Part and Inventory Search

Back
Top