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Recent content by Twix25

  1. T

    What causes WARNING:Xst:2677 in a VHDL code?

    sequential type is unconnected Thks for reply. I check the mapping and all seems correct: Here is an extract from my mapping code top level: signal s0: STD_LOGIC_VECTOR (31 downto 0):= (others => '0'); signal s1: STD_LOGIC_VECTOR (31 downto 0):= (others => '0'); signal s2: STD_LOGIC_VECTOR...
  2. T

    synthesizing problem : WARNING:Xst:647 -

    warning:xst:647 I've wrote a simple programme for shifter script in vhdl. entity L_shifter is Port ( in_ls : in STD_LOGIC_VECTOR (31 downto 0); out_ls : out STD_LOGIC_VECTOR (31 downto 0)); end L_shifter; architecture Behavioral of L_shifter is begin out_ls <= ( in_ls (30...
  3. T

    What causes WARNING:Xst:2677 in a VHDL code?

    Hello, I have got a warning in implementation of my vhdl code but I didn't find the problem cause warning msg: WARNING:Xst:2677 - Node <map28/out_del_3> of sequential type is unconnected in block <top>. WARNING:Xst:2677 - Node <map28/out_del_2> of sequential type is unconnected in block...

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