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Recent content by tspen

  1. T

    transfer data from process1 to process2

    There is a way to complete it .You can use handshake.
  2. T

    Synplify warning, Removing instance.... because .....

    synplify warning show your code ,please
  3. T

    need help - Verilog/VHDL program, prototype boards, EDA

    Help!!! hi , shift register complete detect a series of bits module series_det ( clk , rst , sin , dout ); input clk,rst; input sin; output...
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