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i want to know how to get the dump file for the simulation-based power analysis , i've tried the VCD file but it gave me error :"invalid net toggle probability "-1" , i am using SOC encounter
hi all,
i'm trying to do a layout with i/o pad
this is what i think
the chip has a clock and the clock is generated using crystal oscillator
i had found in the technology files which i had that there is crystal pads but it contain too low info about it so i don't know how to connect them
there...
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