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Thank you for the reply. I spent some time looking for an app note on the subject but haven't found one that addresses this specific issue. I does make sense though that INL and resolution would scale linearly with voltage and noise would not.
I realize that my assumption about the other noise...
I have a circuit that consists of an analog sensor, some signal conditioning, and an ADC (ADuCM360). Everything is powered off the same supply. The ADC supply can be anywhere between 1.8 and 3.6 V. From an ADC noise performance standpoint, I'm trying to decide if there's any advantage to using a...
Thanks to betwixt and FvM for your responses. That's plenty to get me off and running.
I know it doesn't make sense in the context of serial interface standards, but it's what I've got to deal with. Thanks again!
Hi,
I've got a design with a 3.3V microprocessor and I need a configurable interface between the UART and the outside world. It needs to be configurable because the micro will need to be able to talk to a few different devices, each with slightly different voltage level requirements on the Tx...
Thank you for the advice. We'll be sure to follow it for our next layout. Can you recommend and good books, white papers, etc on practical layout guidelines, so we know what else to avoid?
Wow, thanks for taking such a close look. The summing junction of the second stage is not well separated from the input or output of the first stage. In fact, the summing junction of the first stage is not well separated from the input either. It looks like this is a likely culprit to the...
I'd like to preserve info in the input signal from DC to roughly 100Hz, although the upper bound isn't critical. I know that once we start talking about 100Hz it's not really fair to keep calling it the DC component of the signal, but it's still pretty slow relative to the 25KHz that I'm trying...
Sorry if I was misleading. That was not my intention. I didn't realize that I had stated, either directly or through implication, that the DC component of the input signal is irrelevant. The schematic I posted in post #10 is from my LTSpice simulation, and the source there is 2.5Vdc plus 1Vac @...
Ok, now I see what you're saying and it makes sense. The only problem is that I need to retain the DC component of the input signal, so I don't want to remove it with a big input cap. The input signal is a DC component plus ripple at 25KHz. The intended purpose of this filter is to remove the...
LvW, I don't understand your note about the single supply. Would you mind explaining a bit more? Are you saying that I'm railing the opamp on the first stage? I must be misinterpreting what you mean by non-inverting DC gain, because I would say that it is Gdc=+1 (R7/R8 in the schematic I posted)...
Thanks for all the comments/questions. Sorry to say that I haven't had a chance to do any debugging on the circuit, but just wanted to address your questions.
- A schematic is attached.
- There is a single 5V supply.
- The DC gain of each stage is -1.
- I am using a dual opamp (OPA2743).
- I...
Thanks for the suggestions. I had the same thoughts, so I'm glad to hear I haven't done something obviously dumb/crazy.
There are three identical channels on the pcb, each with the two stage filter, and they all have the same behavior, so parts failure is unlikely. I also "beeped" out the whole...
One other piece of info: I simulated this circuit using LTSpice, including the model for the opamp in the circuit. No problems found in the sim.
Any ideas?
Thanks!
Hi,
I've got a circuit that consists of two identical low-pass multiple feedback filters in series, and I'm getting almost no attenuation through the second stage. The cutoff frequency is 1 KHz, and the signal that I'm putting through the filter has a component close to DC and a component at 25...
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