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Thanks Andre,
Actually, CRC is quite new to me. I understand the basics but I'm not quite sure how to translate it to Verilog code consisted of xor gates and flipflops. I saw only 1 article which kind of explains it (http://outputlogic.com/my-stuff/parallel_crc_generator_whitepaper.pdf)
but...
Hi,
I'm looking for Verilog code for crc calculations for the CRC16-CCITT polynomial
g(x) = x^16 + x^12 + x^5+ 1
My input data width is 112.
Can any one help?
Thanks
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