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I'm trying to count distance between two rising edges. i found a problem when i install the program into my Xilinx Spartan 3 starter kit, which the output is different from what i expected. The process is simply:
clk_div is an enable signal and sync with the clk. The simulation result using...
floating point to binary
i'm a newbie at vhdl, but i think i'd rather convert it to 4 bits with other signal as a flag.. but it depends on how i want to use it..
can i do that??
a project was once just gone, and often i couldnt open my projects after i generate the programming file!! it said my project is not supported by (bla.. blaa..) and need to be updated, and it said something about Leornardo Spectrum..
O i hate Xilinx ISE.. :P
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