Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
So i have question i have found the transfer function for the of the given latch circuit, now i want to find the transient equation of the given transfer function, now i think the way i did this is not correct because the units are not matching i am getting frequency as unit on the right hand...
Yes you are correct in practical design we tweak w and l but if i would be able to do through analysis of the circuit in each time frame i guess it would lead to better optimization thats why i am asking and you can consider c as load cap at both the ends of output. and rail voltage as vdd
Okay so I have a circuit, which I have attached given below.
Now I want to find the time constant of the circuit, considering there is equal caps placed at node X and Y.
The problem that I am facing is for small signal model i can easily find the time constant while the circuit is in small...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.