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Recent content by TGupta

  1. T

    Strong feedback mode analysis

    Hi, Can anybody tell me how to do dynamic noise margin analysis for mos SRAM cell in strong feedback mode using HSPICE ? Thanks in advance
  2. T

    Dynamic Noise margin analysis of 6T SRAM

    Hi, Can anybody tell me how to model radiation particle strike or iSEU(t) (SEU-Single Event Upset) type current source for analyzing dynamic stability of 6T SRAM in Hspice. Thanks in advance
  3. T

    Construction of Resampling matrix and Zeroing mask Derivation for an image

    Hi, Can anybody tell me how to construct resampling matrix using linear transformation of form y = (Ap/q) x ,where Ap/q is resampling matrix and x is the input signal and y is output signal And also how to multiply such matrix with an image as I am getting errors.Also how to do zeroing mask...
  4. T

    SNM Simulation for 6T-SRAM cell

    Thanks for the help but I implemented it already.
  5. T

    SNM Simulation for 6T-SRAM cell

    Hi, Can anybody tell how to plot SNM for 6T SRAM cell graphically using matlab.I have obtained butterfly curves ?I am working on the following paper"Static-Noise Margin Analysis of MOS SRAM Cells EVERT SEEVINCK, SENIOR MEMBER, IEEE, FRANS J. LIST, AND JAN LOHSTROH, MEMBER, IEEE".Although there...
  6. T

    How to find gain of inverter in SRAM cell(Both Full CMOS cell and R-load cell) ?

    Hi,Can anybody of you please tell me how to find gain of inverter in SRAM cell and how is it related to cell ratio of SRAM ?Also what does cell ratio signify and its value ?
  7. T

    What is a Square transistor ?

    Can you provide me the source where you heard it ?
  8. T

    What is a Square transistor ?

    Hi, Can anybody tell me what is a square transistor.I came across this word when I was reading the following paper:"Static-Noise Margin Analysis of MOS SRAM Cells EVERT SEEVINCK, SENIOR MEMBER, IEEE, FRANS J. LIST, AND JAN LOHSTROH, MEMBER, IEEE".
  9. T

    Need a project topic in vlsi

    Hi, I want to do a major project in my final year of b.tech in ece related to vlsi testing or interconnect or any other field in vlsi so can anyone suggest me a topic for that it will be very helpful.
  10. T

    Interconnect modelling for high speed vlsi

    Hi,according to the results given in paper S-Parameter-Based IC Interconnect Transmission Line Characterization by William R. Eisenstadt, Senior Member, IEEE, and YungseonEo.Resistance should increase with frequency but mine is not following it.What could be a reason for that ?
  11. T

    Interconnect modelling for high speed vlsi

    Hi, I am working on S-Parameter-Based IC Interconnect Transmission Line Characterization by William R. Eisenstadt, Senior Member, IEEE, and YungseonEo. Here I have designed interconnect using microstrip in ADS momentum and then simulated its S-paramter for 1-10 GHz frequency in order to extract...
  12. T

    S-Parameter-Based IC Interconnect Transmission Line Characterization

    Here I want to work on layout of Mosfet using the method proposed in S-Parameter-Based IC Interconnect Transmission Line Characterization by William R. Eisenstadt, Senior Member, IEEE, and Yungseon Eo and I am using Transmission Line microstrip substrate for achiving my layout but don't how to...

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