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Recent content by terry_kchai

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    ADC input frequency and input bandwidth?

    Thank you for your reply, does the S/H determine the input analog bandwidth?
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    ADC input frequency and input bandwidth?

    Hi, guys I'm confused about input frequency and input bandwidth of ADC, what's the difference? I found that some commercial ADC with 80Msps can handle the input up to 180MHz and can allow the input bandwidth of 500MHz, why is that?What's the relation between them? I know that when input is...
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    Explanation of the "isolation" parameter in RF PA

    Who can explain me the "isolation" parameter of RF Power amplifier? The unit for this parameter is "dBm". What is isolated DC-DC and Non isolated DC-DC? Thanks
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    What is FOM in IC design?

    Who can explain what is FOM in IC design?
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    the weak bird's beak region

    What is the weak bird's beak region of transistor ? thx.
  6. T

    What does FO4 stand for ?

    Who can tell me what FO4 means? A certain period of time ? thanks
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    How to calculate Vo in this inverter?

    an inverter question LvW, How do you get this G formula, can you tell me more detail? Thanks
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    How to calculate Vo in this inverter?

    Hi,guys in the picture, if Vdd=5V , Vss=-5V; input Vi=±100mV, Vo=±4.5V; When connect two resistors like this, also let Vi=±100mV, how to calc Vo now? Thanks
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    Example of rail-to-rail output amplifier

    Hello, Someone please show me an example of rail-to-rail output amp that meets these sepcs: 1> Low Freq Gain≈90dB 2> Driving 50mA output current 3> Ft=20MHz 4> Vos≤10mV 5> Power supply=5V 6> pure CMOS ckt. Thank you in advance.
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    op-amp design problem

    Yes, it is a negative FB. Anything wrong with this schematic?
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    op-amp design problem

    Please take a look at this pic. Actually, my input ranges from 80mV to 1.2V, and need output pass PMOS(MP8) could source 50mA current to drive a transformer. Power supply is 5V. Output swing should be 300mV to 4V As simulation showed, the BW is very small, -3dB freq is around 1Hz.How to improve...
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    op-amp design problem

    how to design op amp This is based on 0.35um 5V CMOS process. I want output res to be low so using a series-shunt feedback. Maybe enlarging my bandwidth-product can be a way, but how to do that? First of all, I need to choose a appropriate structure. Can you help me?
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    op-amp design problem

    2 stage op-amp How to design an op-amp with unity-gain bandwidth of 5MHz and maintain 50-60dB voltage gain? who could tell me which topology suitable for this? Thanks
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    solution for fr ckt design by ludwig

    Would anyone kindly share me the solution mannual for RF ckt design by Ludwig?I need it badly, please. I downloaded one from rapidshare but could not find the code to uncompress it. thank you for your help.
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    Request for Books of RF Design

    Book of RF Design Who can kindly share this book? ≤RF Design Guide - Systems, Circuits, and Equations≥ By Peter Vizmuller And ≤Microwave Engineering, 3rd Edtion≥By Pozar

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