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I am trying to design an LDO and in the process figure out the max current it has to supply (for pass device sizing) and the size of the cap I would need at the output. The LDO is supposed to provide the supply voltage for a previously designed block on my chip. What kind of simulation should I...
Hi, thanks for taking the time to answer. Any hint as to how show this mathematically? I know we consider the average current across L is constant so the average voltage across it is zero.
Hello FvM
If I understand you right, since average voltage across inductor is zero (or average inductor current is constant), we have
Vin - Vout for one half cycle equal to Vin - Vout for another half cycle
Initially it is 1 - 0 = 1V so second half cycle it is 1V - 2V = -1V. Add the two...
so I have a LC low pass filter and I give it a step input like so in LTSpice
Now the inductor and capacitor are ideal with very high Q and no parasitic R. So the resulting Vout is a sine wave oscillating at the resonant frequency. My question is why does the amplitude of the sine wave go as...
So I had one more question, what would be the expression output equivalent resistance for the following switched capacitor circuit. Here V2 is connected to gnd during phi2.
This is not clear.
Let say the voltage at left side is V1 and on the right V2.
When s1 is closed the voltage across C is V1-V2. The charge of C is C(V1-V2). Now s1 is opened and s2 is closed. The voltage across C is V2-V1 and the charge on it is C(V2-V1). So the charge transferred out of the...
I am trying to find the equivalent resistance of the following circuit in baker's book.
How do you get the factor of 4 in the denominator? I am trying to get the answer by using the principle of transfer of charge and conservation of charge like in the case below...
Don't think the faculty at Texas A&M record their lectures for the general public. Palermo is a Stanford guy and some of his material might be from faculty over there. Stanford recorded lectures for the graduate ee classes are only for students. If you do come across video lectures on this...
So I was reading an app note from Microsemi and came across a schematic for type 1 compensation using an opamp RC integrator.
So I wanted to know if this arrangement is right. Wouldn't you need a DC feedback resistor between the output and input to provide a DC path and regulate the DC...
I am trying to figure out how Razavi in his book got the following expression for Closed loop gain of a fully diff. amplifier. The circuit schematic and the equation are below.
I have come across this explanation of the calculation of the feedback factor of an inverting amplifier. This is...
Hey sutapanaki, thanks for the detailed explanation. It helped a lot. I wasn't sure what happened to M1 as VG2 is increased gradually from VDD/2 to VDD. I see that now it continues to stay in saturation while M2 goes into triode because the of the increase of gate voltage. Vout is driven (or...
so I was asked this question during an analog design interview and I got it wrong. The picture of the diff. pair is linked above. VG1 is at Vdd/2 while VG2 is swept from 0 to VDD. The question was to plot Vout and to talk about the operating modes of the M1 and M2.
So my answer would be that in...
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