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Recent content by T Thamodara Jegan

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    Student Version of Tanner 16.0 Available?

    Can anyone tell me if Student version of Tanner 16.0 is available. thanks and Regards, T Thamodara Jegan
  2. T

    Auto Routing in Tanner 15.0 L-Edit

    Anyone who could help in Auto Routing in Tanner 15.0 L-Edit. Say for example I have an Inverter in schematics in S-Edit and not knowing how to draw layout in L-Edit from netlist generated , I have spent quite some time in the analysis. your help could be deeply appreciated. thanks in advance...
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    Layout Design for 10 bit SAR ADC

    Oh I see, so I think we are designing Layout before Packaging to ensure that we have designed the circuit according to the specification as in Schematics. So we have DRC and LVS to ensure correct design. Thanks for your immediate reply.
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    Layout Design for 10 bit SAR ADC

    Thanks, My doubt is , I have the scematics ready.I am working in Tanner 15. How is the Power consumption measured by proper layout techniques? I think when the full layout design is complete, it will be understood. Say in Microwind , we have simulate command in Layout design tool . But I don't...
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    Layout Design for 10 bit SAR ADC

    Hi , I have to design SAR ADC.Front end design is completed atleast by 85%. Regarding Layout design for the same , I am stuck not knowing where to start.If anyone could suggest, it would be of great help Thanks in advance.
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    need information abt tools

    I have not worked on Cadence.Tanner is too good to work with.Initially there will be some trouble till you get used to it. It works perfectly on WindowsXP rather that Windows 7.
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    power consumed in an adc circuit using tanner tools

    Could you please help me to find how to calculate power consumed in Tanner for ADC? .I am actually trying that using hand calculations till now.Your help could be greatly appreciated.

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