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Hy,
I have to use vdd and gnd to limit the output voltage of operational amplifier. I need to do that in VerilogA. I found some example how to do it in specific value but I do not understand how can I use vdd and gnd for that. Example is in **broken link removed**.
Are anyone have a clue how I calculate Rsense? I have found how I calculate voltage in Rsense but in this equation the Rsense is inside the equation. The Rsense is the current sense input what determines the pulse witdth.
Well I simulated AE desing system circuit and getting results. There is something strange, after some time the voltage become stable and the current sense voltage also decrease almost 0. I just cant understand why, it seems like some time is going off and then the voltage is stabilised. OK I...
OK, I managed to get working current sense and closed loop, because if I have lower resistance and the voltage is not rising. But I got only 5V in output with closed loop and the duty cycle is also quite minimal. How I have to use a comp pin to increase duty cycle? What components I have to put...
Hy!
I have circuit what I experiment in Pspice for my graduation work. This is 12V-24V DC converter with push-pull chip. I got with 24ohm load resistor exactly 24V, that means that I have 24W converter and that is what I want. But if I lower the load resistor the voltage going to rise. I can not...
Well I tried a LTSpice little bit, but it seems that there are no other components than Linear Technology. My schematic is here. In Multisim I have a all the components exept pwm chip. I was thinking that maybe I can replace UCC3808 with TL494(beacuse I have that simulation model), I know that I...
Texas Instrument UCC3808 similar spice models?
Hy!
I do a research for a push-pull DC-DC converter for my diploma work. I want to simulate my circuit but I had not find UCC3808 pwm chip spice file nowhere. So is there something similar with that pwm chip which has a spice model? I founded in...
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