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Hi,
I am not able to understand how fault collapsing done in case of transition faults(slow-to-rise/fall).
Just take for example an AND gate. there are 4 collapsed faults for stuck-at(assuming no fanout).
a/0 , a/1, b/0, b/1, c/0, c/1
11 01 11 10 11 00 (or) 01(or) 10...
Hi rca,
Thanks for taking time to answer my questions.
In functional mode one port of a dual port ram works at 100 MHz and the other port at 125MHz.
What will be your MBIST clock frequency?(Assume the design supports upto 130MHz)
And which is the best way to provide the MBIST clock, Direct...
1. In your design you have dual port memories each working at a different frequency. What is the clock frequency you use for testing (MBIST)?
2. When a failure is detected in parallel testing of memories, how do you know which memory is failing?
3. What are the extra pins needed for BIRA (Built...
Hi,
Isn't it 300*1+300*1 for parallel simulation?
As there are 300 patterns and you one cycle to load and one cycle to capture.
And one more question. How does the unload happens? does the simulation tool reads directly from the o/p of scan flops?
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