Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by spacejedigundam

  1. spacejedigundam

    how to Vernier TDC adjust every stage time differential to achieve 1 TLSB ?

    How do we get td1 - td2 = 2ns? I have no IDEA about how to adjust delay cell
  2. spacejedigundam

    Did someone know how to make this SAR ADC 5 to 4 digital error correction circuit

    DEC1 is similar to half adder , b<K> is number of the SAR output code ,DEC2 is like binary caculator keep carry , but how to do this circuit ?
  3. spacejedigundam

    How to measure 10bit SAR ADC 's input Dynamic range after switch 9 time ?

    I want to know 10 bit SAR ADC , supply voltage 0.5V , Vcm based , after DAC switch 9 times , how to measure DAC input Dynamic range ? I need to know voltage range that I can use Voltage to time Converter transfer the voltage to times Thanks everyone reading Sample_N = DAC's N node...
  4. spacejedigundam

    How to make a 10bit SAR ADC achieve 12bit resolution?

    I want to do a 10bit ADC, but after run I an FFT, the ENOB (effective number of bits) result will achieve 12 bits. Is this possible? How can I do it? thanks reading
See more

Part and Inventory Search

Back
Top