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nanoroute
Does anyone know why nanoroute sometimes during optimization (search and repair iterations) it does incrementally (10%,20% etc) like it does for initial routing. Just curious to know what it implies.
thanks in advance
Re: Frontend vs. Backend
hi all,
in vlsi both front end and back end are important.but some one told one example 10 years experience guy has tool experience.it is right up to some extent only.it needs so much thinking, finally BE guy closes the design.
thanks.
Re: clock buffer
clock buffer has the same rise and fall times.i.e input transition=optput transition.
it is the must and should condition for clock buffer,but normal buffer may not be.
thanku
sizzler
Re: doubt
hello 0.2 micron technology means it is the width of the transister.
width of the transister means gate width of the transister.
check the width of the gate of particular transister you are working.
you are under training or design engineer.
regards
sizzle
clock gating methodology
hi all,
first of thanks to all,
ICG cell is nothing but Integrated clock Gating cell.it is used for better power reduction.
best regards
Re: Stage Ratio
hi all where we can find this stage ratio.
and how it helps in the design.
and how to chnge this value.
and what is the criteria to change this value.
thanku
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