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Recent content by sheik_vb

  1. S

    How to increment a sc bitvector of width > 32

    Hi Chetan, you declared the counter as ulong. ulong is nothing but 32-bit. Thats y u'r counter value become 0 after FFFFFFFF.
  2. S

    need datasheet for XC2C256 TQ144

    xc2c256-tq144 datasheet Hi, You can download from https://www.xilinx.com/support/documentation/data_sheets/ds094.pdf
  3. S

    FSM desaign for lift conttroller

    lift controller using fsm Hi, Lift controller flow chart....
  4. S

    CAN ANYONE PLS FIGURE OUT D PROB..(VERILOG MODELLING STYLE)

    verilog error unexpected token: Hi, In the below instantiation, can u change 'b0 to 1'b0 and try...... A1(remainder,divisor_alias,'b0,remainder);
  5. S

    what is booth's algorithm and its code - need help

    Re: vhdl
  6. S

    Verilog simple but bit confusing

    Yes Correct.
  7. S

    LCD Interfacing Doubt - How to find the opearting frequency

    Re: LCD Interfacing Doubt It depends on LCD not a board frequency.
  8. S

    Where Can I Find Some Free IP Cores?

    bbs?
  9. S

    XAPP290.zip for XAPP290 (v2.0) by Emi Eto

    xapp290 Hi, you can download from the below mentioned link. www.xilinx.com/support/documentation/application_notes/xapp290.pdf
  10. S

    block memory access prob (ISE & Quartus)

    Hi, Can you post your rtl...
  11. S

    synchronous reset (verilog)

    try this code assign reset_n = syn_rst_n & rtl8305_mtxen ; always@(posedge sys_clk_25m) begin if(!reset_n) begin toggle_bit<=1'b0; end else toggle_bit<=~toggle_bit; end
  12. S

    How to use Xilinx coregen FIFOs?

    coregen fifo simulation Hi, UART code is attached for your reference.
  13. S

    How to use textio function in testbench to input text file as input?

    Re: textio function Hi, You can input by using below mentioned command..... "readmemb("filename.txt",variable_name);"
  14. S

    Problem with declaring inout port in code

    Re: problem inout port module check(a,s1,out,d,enable); input s1,enable; input a; output out; inout d; wire b; wire d; reg out; assign b = d; assign d = (enable & s1) ? ~a : 1'bz; always @ * if (s1 & enable) out = a; else out = b; endmodule
  15. S

    PS2 Keyboard with Spartan 3E

    spartan 3 keyboard Hi, you can find the PS/2 Keyboard protocol information on **broken link removed**
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