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Hi bhagyasree,
U are absolutely correct. Dummy poly and dummy transistors are for fabrication purpose. Otherwise they have no meaning. Dummy poly is for protecting the main gate from etching. and Dummy transistors are for couple of protections, one in matching and othercase is in LOD effect...
Anisotropic process steps cause assymetries in process. The mismatches caused by this effect can be avoided by maintianing same orientation such that the current flow will be strictly in one direction.
And poly orientation issue might come under DFM issue too.. the stress effect will be...
Anisotropic process steps cause assymetries in process. The mismatches caused by this effect can be avoided by maintianing same orientation such that the current flow will be strictly in one direction.
And poly orientation issue might come under DFM issue too.. the stress effect will be...
hello deepika,
first of all tell me what are you working on.
and which field are you interested in
1)PCB
2)custom IC
3)digital
there are different ways for each field
hope you understand
regards,
sudheer chowdary
sorry guys..........
i'm using virtuoso cadence for analog layouts...........
i have a bus of 1279...........if i wanna label that is there any SKILL script to make easier rather than naming each one................
hope u understood my question?
hiiiiii all,
@above
plz post the skill code for fixing off grid problem..........
if i have a bus of 1280, how to generate the labels?
is there any script for generating automatically?
ASAP
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