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Hi,
feed the signal into a monoflop with a pulse time just a bit below 4ms. This will give you a signal with a duty cycle depending on input frequency. Then you can just low pass filter the signal to get a linear frequency dependent voltage.
You could add an offset to utilize the full input...
J202
The J174 has much better square law characteristics (seems all the P channel types have) but is much noisier.
Interestingly PNP transistors have lower noise than NPN, P-doped schottky diodes have lower noise than N-doped but P-JFETs seem to have higher noise than N-JFETs.
Hi,
**broken link removed**
Second page, upper left figure.
This is regarding LDMOS but that behaviour near Vp should be similar in JFETs.
These figures show deviation from square law quite dramatically:
gfs should be a straight upwarts heading line from Vp to the left with some knee...
Hi,
here on page 5 is a nice explanation of Rs corrupting the square law.
So if I want the linearisation network to work correctly I have to stay away from near the Vp and also avoid the region where Rs is not negligible anymore.
Seems I am going to order a lot of samples and invest some...
Interesting point. But why does RdsOn go on sinking with increasing VgsOff while gm almost stays the same?
Also IDSS looks linearly dependent on VgsOff in the process datasheet which would explain the fixed gm but not the falling RdsOn.
If these data are true (which should be as the...
Hi,
I came across the BF246C which seems to have very high Vp.
**broken link removed**
One strange thing is that if I calculate gm @ IDss from IDss and Vp I get roughly 40mS for all three bins (A, B and C).
Usually gm at IDss increases with higher IDSS and gm of the higher IDss bins comes...
With real devices you have to stay clear quite a bit from Vp with the gate voltage, as close to Vp the characteristic deviates from square behaviour and so the linearisation with the gate voltage divider does not work work very good anymore.
The J174 is very good with respect to this as it has...
The issue is dynamic range.
Lower Vp limits the possible signal voltage level due to nonlinearities.
Lower RdsOn limits the possible signal voltage level because of the needed impedance matching (maximum available power is limited).
The noise voltage of the next stage is fixed, so the lower...
Hi,
thank you for your quick answers!
The 2N4391 and J111 are nice regarding the high pinch off voltage but unfortunately their RdsOn are much too low (30 Ohms for VgsOff of 3V, so maybe 10 ohms for devices with VgsOff above 9V).
I would have to bias the gate with a quite high negative voltage...
Hi,
as the dynamic range of a variable attenuator built with a JFET is dependent on the pinch off voltage (I know about the increasability by feeding back part of the drain voltage to the gate) I am looking for a JFET with a pinch off voltage being as high as possible (10V and up are very...
You might want to look there:
**broken link removed**
By the way, usual JFETs are built that way:
P-Substrate (for NJFET)
N-channel doping (diffusion, ion implant or epitaxy)
P-gate doping
If the substrate is not brought outside it is either connected to the top gate (symmetrical fets) or...
Hi,
the 3N143 Borber mentioned has such a configuration (separate bulk connection which is connected to one pin together with the case while G, D and S have their own dedicated pins).
Only it is a MOSFET which I can not use because of too high low frequency noise.
The good low frequency noise...
Sorry if I am sounding unpolite, but this JFET does not have a separate bulk contact. Either it does have only the bottom gate (don't know if this would be possible) or just has bottom and top gate connected together on chip.
Anyways, nice datasheet, thank you.
Regards,
Schmocki
Hi,
I thought the 2N4222 had substrate/bulk connected to the case pin.
And the question is regarding discrete n-channel single gate junction fet built on a P substrate with a P gate where the substrate-channel junction acts as a bottom gate.
@Borber
I am only looking for JFET because of low...
Hi,
does anyone know a JFET with separate Bulk pin (maybe like the 2N4220/1/2) where there are data available on the effect of non-zero bulk-source-voltage on drain current, transconductance...?
Best Regards,
Schmocki
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