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Based upon the characteristics of floating body in SOI, history effect seems to be a trouble maker in circuit designs and simulations. Does it seriously impact on the circuit performance?
Hi Pulzar,
Many thanks for your feasible guideline. I'm little confusing with your statement "and then start lowering it until you do see them appearing". I don't exactly catch your points. If it's convenient to you, could you elaborate it? Do you mean to reduce the number of setup violations...
When you use MOSCAP in deep submicron, you should be careful that
1. the gate oxide is very sensitive to ESD, if you directly connect power to gat;
2. the leakage of MOSCAP is a critical issue;
When I applied MOSCAP as the on-chip decoupling capacitors, I found that the leakage of those decoupling capacitor is an issue.
The leakages result from subthreshold one and gate tunneling one. Is it a feasible approach to apply reverse-biased junction diodes as the on-chip decoupling capacitors?
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