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Recent content by sbc

  1. S

    Passing vector parameter to Verilog-A module

    Hi all, I work with HSPICE2010 and have a Verilog-A module which has vector and real parameters. I am not able to pass such vector parameters from the netlist file. No problem with real parameters only. NETLIST ======= .hdl mylibrary.va x1 node1 node2 mymodule realpar=12.2 vectorpar='[1,3]'...

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