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Aha! There it is.
TrickyDicky - You were correct that hwrite was converting the meta value "U" to 0. Being more of a Verilog person, I was unaware of the nuances of write and hwrite. Using
write(msg_line, STD_LOGIC_VECTOR'(TriggerOutArray(0))); instead of hwrite(msg_line, TriggerOutArray(0))...
I just went through getting an enclosure for some boards we have running. It wasn't a complicated design and we originally thought of 3D printing, but one option that we didn't originally think of was laser cutting. I was able to draw up a design for a simple enclosure that was cut at a shop and...
VHDL: Comparison between vectors
Hi all,
I'm working on simulating a VHDL design using a self-checking testbench. As part of the error checking, I compare two values: one that is the expected value and one that is the received value. Both of these values are 16-bit std_logic_vectors and are...
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