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Recent content by samiurrehman

  1. samiurrehman

    [SOLVED] what is "weak inversion region"?

    weak inversion region and subthreshold region are the same regions. If you look at the cross section of the layout of a simple mosfet(nmos and pmos) you can see a virtual BJT b/w NMOS and PMOS thru which a current flows: leakage current. When your MOS is off(Vg<Vt) this BJT is still conducting...
  2. samiurrehman

    IC fabrication equipment cost analysis

    Dear all, Greetings.... I have to compile a report regarding the IC equipment manufacturing cost for Si based technologies and 3rd/5th group based technologies. By equipment i mean the machines which perform epitaxy, oxidation, photolithography, ion implantaiton and etching. Can anyone help me...
  3. samiurrehman

    Modelling OTA non linearities

    How can I model Operational Transconductance Amplifier (OTA) non linearities to extract the accurate transistor level specifications? Is there any MATLAB toolbox which can yield such specifications??????
  4. samiurrehman

    BJT Technology Specification

    Dear all, A number of papers with BiCMOS circuitry would use emitter length as the primary specification, like in one paper it says "0.180um*5um" with a specific npn hbt...what i conclude from this specification is that this hbt (high freq bjt) shall be built with 180nm technology with an...
  5. samiurrehman

    Behavioral Modelling of Delta Sigma Modulator

    Thanks for your reply, I have been using Cadence and verilog A for behavioral modelling but i have failed to get the required results. I shall download LTSpice and work with it. Have you ever used Proteus software. Do you think it is good for behavioral modelling of delta sigma structures.
  6. samiurrehman

    Behavioral Modelling of Delta Sigma Modulator

    Dear friends, I have been studying behavioral modelling for continuous time delta sigma modulator using Richards Schreir's "Understanding delta sigma converters". I have also pasted the image which is given on his book at page # 321. He has used some software for behavioral simulations which...
  7. samiurrehman

    Sigma delta ADC question ( somebody help me please ) !

    I have verilog A code for delta sigma modulator. Every block is written in Verilog A, Its simple. I believe you are being misled.
  8. samiurrehman

    publication of papers

    Thank you LvW, i was aware of Electronics Letters but i shall try the others too...
  9. samiurrehman

    publication of papers

    Dear Friends, Does any one know a credible website where we can submit reliable and high quality papers free of cost. And the website uploads the paper on its journal or website while adding the paper to its database. IEEE papers take too much time in the whole process!
  10. samiurrehman

    OTA followed by buffer

    Thanks for reply Ok let me be a little more clear. It is a fact that OTA has practically very less output load driving capability and we need an output buffer stage to drive our load. I am confused with this output load stage which must drive a load of atleast 5pF. I want my unity gain frequency...
  11. samiurrehman

    OTA followed by buffer

    Dear all, We know OTA followed by a load driving buffer stage is what constitutes an operational amplifier. Can anyone show me how to design a buffer stage stage such that it doe not insert the dominant pole and the frequency response of the OTA remains undisturbed and the load is also driven!!
  12. samiurrehman

    low pass delta sigma modulator

    I would like to know the various types of delta sigma modulators based on the frequency range they cover.....especially the ones used in RF applications. How do we classify the low pass and band pass modulators?? What differences do they have...does the difference lies in the integrator part of...
  13. samiurrehman

    How does this cascoded current source work

    Dear all, Below is what is called a cascoded current source, if some one knows how does it work plz explain.
  14. samiurrehman

    Help me with calculation of SNR

    Re: Calculation of SNR I have the same problem, can someone upload some tutorial documents related to calculator functioning in Cadence.
  15. samiurrehman

    W/L ratio of CMOS circuit

    Dear all, I worked out a paper on telescopic OTA, and in the paper the aspect ratio (W/L) was written like this : 15u/500n (*6) does it mean that original w is 15u*6??? I am sorry for asking this.....

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