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ppc405 fpu
Xilinx provides a single precision floating point unit for the PowerPC 405 processor with the EDK. does any one know of any double precision floating point IP for the PowerPC 405?
lpm_shiftreg xilinx
I am porting a design from Altera to Xilinx and the design uses the lpm_shiftreg with a serial input and parallel output. I have looked at the Xilinx LogiCORE RAM-based shift register but the problem is that it doesn't have a serial input.
Can someone point me in the right...
has anyone successfully implemented partial reconfiguration on a Spartan 3? i know that only difference based partial reconfiguration is available for Spartan 3 but is it even possible?
yes, that might be a possibility. but I cannot advise on the ICs you should be looking for.
be warned that GSM is a very complex system and you might need to do a lot of homework before you actually start to design your own GSM module.
and by the way, why do you want to design a whole GSM...
i believe that GSM could be realized on an FPGA except for the analog frontend etc.
you see, if its digital, its possible on an FPGA. but a GSM module has analog parts as well. but you cannot realize the analog parts on an FPGA.
i hope this helps
by the way, what are you trying to do?
If you have no prior knowledge of FPGAs/Digital Design then I second blueroomelectronics. You should start with something easy like he said. Once you get into the game, you can come back to the FPGA4Fun tutorial link I gave you.
FPGA with Processor
There is no difference between a hardcore microprocessor in an FPGA and a "true" microprocessor. In an FPGA the hardcore microprocessor is surrounded by LUTs, BRAMs, Multipliers and DCMs etc.
I hope that helps
Lattice Vs Xilinx and @ltera
It all depends on what you application. For instance, if you are designing an SDR then you might want to first have a look at the application notes available from a specific vendor on SDR. You should also have a look at the design tools of the specific vendor and...
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