Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by salil87

  1. S

    Issue with understanding RHP Zero

    From my understanding an RHP Zero causes phase lag of 90° while magnitude increases. But my doubt is here; doesn't RHP zero initially increase phase by 180° and then decrease it by 90°. But why do people not consider this 180° lead initially. I'm a bit confused about this. Thanks.
  2. S

    First Order behaviour of an Opamp for stability

    Should the Opamp behave like a first order filter till unity gain for better stability? Why? Cause second order behaviour is also stable since -180 degrees is only reached at infinite frequency. Thanks.
  3. S

    LTSpice Clock signal distortion

    Hi I made a counter using Dflop in Ltspice. But when I am using the count bits as signal to other circuits the clock signal is getting distorted. Why is this happening? How can I overcome this problem? Thanks Salil
  4. S

    OTA in dual slope ADC

    Hi I want to use an OTA integrator in a dual slope ADC. But since the input signal is large signal wont it change the gm for different levels? Thanks Salil
  5. S

    OTA as an integrator

    Hi I just want to get some idea how to use an OTA as an integrator (for dual slope ADC). Can some one help me out or give me some links? Thanks Salil
  6. S

    Mosfet: Why Saturation Mode?

    Hi Why do we always bias a mosfet in Saturation mode? Is it becaus gm is more in saturation or is it because gm is more linear in saturation? Thanks Salil
  7. S

    Biasing NMOS using current mirror

    Thanks for replying ducvilla. Actually I am in the nascent stage of MOSFETs so I am talking about single stage. What I am not getting is if the Id current is biased by a constant current source then how will it change with the input signal so that we get the proper amplified output? Well if it...
  8. S

    Biasing NMOS using current mirror

    Hi I need a brief explanation on how a Current Mirror is used to Bias an NMOS using Constant Current Model. My Doubts are :- * Where the input is given ? * If the current remains constant how does it work ? * If the current does not remain constant then why say constant current ? Bit Confused...
  9. S

    Doubt on MOSFET Body Effect

    I found on my notes that for an NMOS with increase in Vsb voltage Body Effect increases, Vt also increases. But it is mentioned that with Vgs constant id increases which I feel is wrong since id is proportional to (Vgs - Vt)2. Hence I think id should decrease. Please show me the light :| Thanks...
See more

Part and Inventory Search

Back
Top