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Recent content by sachin maheshwari

  1. S

    Problem with doing place and route using SOC Encounter

    Re: SOC Encounter i have implemented a synchronous up-down counter with load, reset and mode pins. so i want to see its GDSII format,but i got stuck at encounter(cadence) so before importing the design to SOC Encounter i have synthesized and generated .sdc and .v files only. u was saying about...
  2. S

    traffic light controller

    can anyone tall me wat all variations i can do in my traffic light controller design using VHDL em only doing the controller part.
  3. S

    What is the basic things you need for doing synthesis in VHDL?

    hi wat is the basic need for doing synthesis.(VHDL)
  4. S

    Difference between signals and variables

    thanx for the answer but i want more relevant answer.
  5. S

    Difference between signals and variables

    hi ..... can anyone tell me wat is the difference between signals and variables in VHDL
  6. S

    Interview Question on Inverter

    hi.... i m sending answer for the 2nd one.. it will work like a weak buffer......
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