Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
FOR help !error: generic or port clause in a block statement is not supported!
library ieee;
use ieee.std_logic_1164.all;
entity full_adder is
port(a,b:in std_logic;
cin: in std_logic;
co: out std_logic;
s: out std_logic);
end full_adder;
architecture rtl of full_adder is
begin...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
