rudder
Newbie level 2

FOR help !error: generic or port clause in a block statement is not supported!
library ieee;
use ieee.std_logic_1164.all;
entity full_adder is
port(a,b:in std_logic;
cin: in std_logic;
co: out std_logic;
s: out std_logic);
end full_adder;
architecture rtl of full_adder is
begin
example:block
port (a_A:in std_logic;
a_B: in std_logic;
a_Cin:in std_logic;
a_Co
ut std_logic;
a_S
ut std_logic);
port map(a_A=>a,a_B=>b,a_Cin=>cin,a_Co=>co,a_S=>s);
signal tmp1,tmp2:std_logic;
begin
p1
rocess(a_A,a_B)
begin
tmp1<=a_A xor a_B;
end process p1;
p2
rocess(tmp1,a_Cin)
begin
tmp2<=tmp1 and a_Cin;
end process p2;
p3
rocess(tmp1,a_Cin)
begin
a_S<=tmp1 xor a_Cin;
end process p3;
p4
rocess(a_A,a_B,tmp2)
begin
a_Co<=tmp2 or (a_A and a_B);
end process p4;
end block example;
end rtl;
library ieee;
use ieee.std_logic_1164.all;
entity full_adder is
port(a,b:in std_logic;
cin: in std_logic;
co: out std_logic;
s: out std_logic);
end full_adder;
architecture rtl of full_adder is
begin
example:block
port (a_A:in std_logic;
a_B: in std_logic;
a_Cin:in std_logic;
a_Co
a_S
port map(a_A=>a,a_B=>b,a_Cin=>cin,a_Co=>co,a_S=>s);
signal tmp1,tmp2:std_logic;
begin
p1
begin
tmp1<=a_A xor a_B;
end process p1;
p2
begin
tmp2<=tmp1 and a_Cin;
end process p2;
p3
begin
a_S<=tmp1 xor a_Cin;
end process p3;
p4
begin
a_Co<=tmp2 or (a_A and a_B);
end process p4;
end block example;
end rtl;
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