Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by rosaeidi

  1. R

    [SOLVED] Mismatch Contribution Analysis

    I don't know how to run and use "Mismatch Contribution Analysis" capability in Virtuoso ADE GXL. Could someone please help me?
  2. R

    What is the meaning of "post-CMOS electronics"?

    Hi What is the meaning of "post-CMOS electronics"?
  3. R

    tsmc 40nm (minimum size)

    The minimum size of tsmc 45nm tech file is 600nm! Not surprising?
  4. R

    write a netlist in cadence

    Hi How can I write a netlist in cadence to simulate my circuit design like hspice sp? I dont want to use schematic.
  5. R

    tsmc 40nm (minimum size)

    I have designed my circuit with the width of 60nm, however the minimum size of this tech file is 600nm! I have a 90nm tech file with the minimum size of 120nm. Why the minimum size of 45nm tech file is 600nm!
  6. R

    tsmc 40nm (minimum size)

    Hi Does anyone work with "tsmc 40nm Mixed Signal RF"? The tables of this tech files shows that the minimum possible size of its transistors is 0.6um!!! What does it mean? I need a 40nm tech file for SRAM cell design? How can I use this tech file?
  7. R

    how to use .scs file

    Thanks, but how can i use this model for circuit simulation? I only know about the schematic and layout simulations.
  8. R

    how to use .scs file

    I have only the scs files not *.lib file. In your tutorial, it edits the library: 1. Open up the Linux terminal. 2. Goto your specified lab folder, i.e. EE330 or as you’ve defined in lab. 3. Type “gedit cds.lib” in the terminal. 4. Keep everything that’s in there and add the following...
  9. R

    how to use *.scs file in cadence spectre simulator

    I have the same problem. How can I create a model from scs files?
  10. R

    how to use .scs file

    Hi I have some *.scs files. How can I use them for circuit simulation in hspice or candance? How to Convert Spectre Model Card to HSPICE model card?
  11. R

    Histogram and Scatter Plots from the results of Monte Carlo Analysis Using Hspice

    I have the same problem.
  12. R

    FinFEt model parameter

    Hi Is any free version of UFDG model for fimfet? SOI Group - Professor Jerry G. Fossum
  13. R

    What is the meaning of "high" in "high SoC design" ?

    I found it in SRAM design papers.
  14. R

    What is the meaning of "high" in "high SoC design" ?

    Hi What is the meaning of "high" in "high SoC design" ?
  15. R

    weak inversion current

    Hi I'm confused with NMOS and PMOS transistors in subthreshold region. Which of them has the higher current value, for a given value of Vgs? Which of them has the higher subthreshold slope? Which of them has the higher value of threshold voltage? I'm working with 90nm Tech. Rosa
See more

Part and Inventory Search

Back
Top