Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
level shifter inverter
The simplest thing you can do is cascade two inverters together. The first inverter will use 3.3V transistors, operating off a 3.3V supply. The second inverter will use 1.8V transistors operating off a 1.8V supply.
The only thing you have to be careful of are...
Need of a book --
Hi sp3,
The link is dead for it (the forum says that it has been removed). Can anyone provide me a link to this eBook?
Thanks to everyone in advance!
Re: IR drop Analysis
Voltagestorm DG (Dynamic Gate), or the "Power Meter" tool in Voltagestorm (I think they're the same tool, but Cadence has just had different marketing names at different times)
Here are some links:
PDF slides discussing static and dynamic IR drop analysis of Voltagestorm...
Re: why matching
The functionality of analogue circuits usually depends on either symmetry between devices, or precise ratios. For example, if you're making a differential pair, you will (most likely) want the transistors to be exactly the same, or the circuit behaviour will be funny. If you're...
Thank you for the links. I already own the Richard Schreier book. The chapter on DACs only goes over DAC architectures rather than the math involved with things like quantization.
Can you at least tell me if quantization noise is spread over the sampling frequency for oversampled DACs? I mean...
I am trying to design a sigma-delta DAC. On page 40 of **broken link removed**, a figure of the in-band noise for various types of samplers is shown:
I understand that these spectrums are for ADCs. Do the same spectrums apply to DACs? That is, if I use a simple, oversampled DAC, will the...
This all depends on the type of probe card you're using. First, you need to solve the design problem: what sort of buffer needs to be inserted between the on-wafer buffer, and the probe tip. Once you know what kind of performance you need, then you can begin looking for a part which meets your...
No. In static CMOS, the transistors swing all the way to cut-off, so there is no Vt drop. You're thinking about Vt drops in analogue circuits where the stacked transistors are all kept in saturation.
Yes, Yes, Yes, the limit is your target speed.
Are you sure you're really a University of...
You need to have a buffer between the ring oscillator signal and the probe tip. Most designers build the buffer on-chip, but you can try doing it off-chip.
10 pf capacitor
**broken link removed** is a good starter on the layout of a capacitor. Make sure you're using the right layers for your own process. Also, you should take a look to see if there is a capacitor layout in the libraries provided by your foundry.
**broken link removed**
The two important equations are:
**broken link removed**
**broken link removed**
If the gate oxide thickness is reduced, then the gate area capacitance willl rise (\[C_{ox} \hspace{4mm} = \hspace{4mm} \frac{\epsilon_{ox}}{t_{ox}}\]). If \[C_{ox}\] rises, then the two...
Chopping and auto-zeroing are useful techniques for handling 1/f noise in amplifier circuits (**broken link removed**).
What is your definition of "near DC?" Some people consider 500KHz to be a low frequency, whereas others are focused on the audio band of 20Hz - 20KHz. The simulators are...
Here is a paper on the matter. I read it over and looked at their data, and I'm not convinced of the technique. Look at tables 3 & 4 and tell me whether or not the buffered interconnects really have any lower cross-talk. It doesn't seem like it.
The drain current of an n-type MOSFET in saturation is given by:
\[ I_{DS} \hspace{4mm} = \hspace{4mm} \frac{1}{2} \mu_{n} C_{ox} \frac{W}{L} \left[ 2(V_{gs} - V_{t})V_{ds} - V_{ds}^2 \right] \]
The W term refers to the gate width of the transistor. As you can see, increasing the gate width...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
