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Recent content by reservevoltage

  1. R

    UART Transmit issue with CPLD

    Hi FvM, ı have changed some line at my code and wrote test bench code. However still ı can not communicate with PC by using usb TTL. I have no ıdea what ı have to do. Could you examine the code and please tell me where is my mistake test code library ieee; use ieee.std_logic_1164.all; use...
  2. R

    UART Transmit issue with CPLD

    Hello, I have a demo card named cpld c-m240 epm240t100c5n. I tried to send the data with uart and have a synchronous problem. (ı think) According to my basic information in Uart communication, the duration of 1 or 0 for each bit (at 9600 baudrat and 50Mhz clok) is 104us. I divided the 50Mhz to...
  3. R

    100MHz SPI Clokck Generation

    Hi KlausST, ı have tried to communicate between ltc2335-16 and EPM240t100c5. ı wanted to indicate SCKI signal and have a demoboard which name is cpld c-m240 ı couldnt share a real code unfortunatelly because of remote location. A shared code is a part of real code. library IEEE; use...
  4. R

    100MHz SPI Clokck Generation

    Hi there, I have a trouble with spı clock. Please consider that ı like a toddler for logic circuits. SCKI frequency has an oscillation when ı tried to create 100MHz PWM clock for SCKI. My reference clock is generated by 100MHz sinus active osilator. Actully, Simulation is ok. oscillation...
  5. R

    UART Problem on CPLD c-m240 board

    Hi there, Currently ı have worked on cpld demo board which name is cpld c-m240 (clone board). The board has epm240t100c5n cpld. In this board, ı have tried to communicate with PC by implementing UART. However, my code is not working properly on the board. I'm waiting your a brilliant...

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