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Recent content by RajkumarS

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    [SOLVED] Low Voltage DC Level Shifter

    Hi zulqar, Amplify the signal by using CS stage then buffer the signal by using DC level shifter. Thanks Rajkumar S
  2. R

    [SOLVED] Comparator Analysis in cadence

    HI amayilsamy I am asking about hysteresis of comparator, can we calculate similar to schmitt trigger another question is bandwidth of comparator Thanks Rajkumar S
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    [Moved]: doubt on PMOSFET SOURSE terminal conections

    Hi In some design it may connect with source to avoid body effect, otherwise its better to connect with higher potential to avoid pn junction with forwardbias bettween source and bulk Thanks Rajkumar S
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    [Moved]: doubt on PMOSFET SOURSE terminal conections

    HI we wont do like this this creates current flow from source to bulk, which is not needed Thanks Rajkumar S
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    [SOLVED] Comparator Analysis in cadence

    how to calculate bandwidth and hystersis of the comparator
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    Stability measurement

    Make your opamp as a closed loop by connecting a probe which connects the output and input(in1 or in2 based on your circuit). Then run the stability analysis by considering the probe as a stability finder. Check stability summary if phase margin is 60 to 90deg means your circuit has good...
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    How to start learning about transformers

    yes its intresting to design fm tsr work on it
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    [SOLVED] how to avoid Transmission gate input output variation when frequency is high

    how to avoid Transmission gate input output variation when frequency is high wheather we have to increase width or length?why? thanks in advance.
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    transistor as a switch - cadence problem

    use TG for switch operation. it has some advantage over pass gate.
  10. R

    transistor as a switch - cadence problem

    connect the bulk to ground and try it.

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