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Recent content by puneetshah

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    Speed up Nanosim simulations

    Hi, Please share some tricks to speed up nanosim simulations..... I have launched simulation for smps which is simulating at very slow speed.......and i want results very fast..... from one experienced person i came to know that increasing acc_limit and pwl_limit speeds up the...
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    Virtuoso descend hierarchy prompting

    thanxs for suggesting link its a nice one and i got my answer.......
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    Virtuoso descend hierarchy prompting

    how to create command i mean what it should be ??
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    Virtuoso descend hierarchy prompting

    Thanxs but could you please tell me how to set bind key for this command exactly....... i know how to set bind keys for single command but i dont know how to embedd cell view in to bind keys.........jplease tell me what shold i write ???
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    Virtuoso descend hierarchy prompting

    Hi, I m newbee in virtuoso......... I gets frustated in descending down and up the hierarchy bcoz every time it PROMPTS me for before descending..... I have heard that there is some way to disable prompting..... i.e just by pressing 'e' i can descend in the hierarchy........... in short I...
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    Virtuoso descend hierarchy prompting

    Hi, I m newbee in virtuoso......... I gets frustated in descending down and up the hierarchy bcoz every time it PROMPTS me for before descending..... I have heard that there is some way to disable prompting..... i.e just by pressing 'e' i can descend in the hierarchy........... in short I...
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    mos differential amplifier

    mos differential amp try sedra and smith........it will help u.....
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    Doubt STA related to Input to Reg path, explanation request

    Doubt STA..... Hi all, I have read in some PPT that for maximum freq of clock we check for following timing paths for maximum delay : 1. Reg to Reg 2. Reg to output 3. Input to output My question is that why we donot consider "Input to Reg path" for maximum frequency calculation ?? Please...

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