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Hi I am trying to export a layout from Cadence to a .eps file to import in a LaTeX doc, but the eps file is very heavy (3 MB) even with a small design (100 mu x 300 mu in 0.35 mu tech.). Has anyone found a way to reduce this ?
Regards,
Peter
Yes you were right, some of my problems were that I thought that the port gave another amplitude. To me it seems like the AC magnitude is set as a V peak value and not as a V peak peak value. Because when I set my two differential inout ports to 500 mV in AC magnitude and one of them with a 180...
I have for some time been simulating a full differential gilbert cell VGA using vsin as sources. Because I want to simulate P1dB and NF etc. i have exchanged the vsin sources with ports. And because the input is not matched I have set the port resistance to 1n ohm to resemble the vsin source as...
Re: Variable gain amplifier
I am talking about a frequency of about 1.6 GHz, so application notes about VGA's for 0 - 50 MHz is probably not really going to help me, but thanks anyway.
I have actually been simulating a gilbert cell in cadence with good results. With the right trimming it has...
Re: Variable gain amplifier
Thanks a lot. I will try to get a hold of the book. If others should be interested the book is : "The Art of Electronics, by Paul Horowitz, from Cambridge University Press, from 1989 and reprinted in 1993".
Have you (wee_liang) by any chance designed a VGA ?
Variable gain amplifier
Does anyone know about a good book or article about designing a variable gain amplifier at RF frequency ?
And perhaps with a flat phase response versus gain variation ?
/Peter
/net is not a kept output
When I have done a DC analysis with a design variable sweep and try to plot a current using Direct plot -> Main Form and selects the drain terminal whos current I want plotted, it returns an error : "ERROR: /MN0 /D is not a kept output".
Does anyone know what I do...
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