Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by pavan5720

  1. P

    How to do a link budget analysis of Backplane

    Hi I am trying to design a High speed serial electrical link in cadence , i am getting confused how to distribute the top level parameters to block level . Any ideas on these links, books or any sort of material can be mailed to me . Reg Pavan
  2. P

    How to decide the bias current in designing CML latch ,

    If say the swing is 0.4v , capacitance c is 0.5p , let the regenrative time is 0.05n second , as Q=i*t, Q=c*Vswing, so I=C*vSwing/Treg , I tried doing this but regeneration is not working , corect me if i am wrong
  3. P

    How to decide the bias current in designing CML latch ,

    I am Desigining a CML d LATCH IN 0.18um technology Cadence Virtuoso , how to decide the bias current and the regenrative time
  4. P

    umc optimum capacitor/inductor finder in cadence spectreRF

    Hi Is there a way to do use umc optimum capacitor/inductor finder tool in 0.18um technnology atleast without ocean scripts Thank you Pavan
  5. P

    Optimum inductor finder in UMC .18um tool

    Hi I am Designing a LC VCO in cadence spectre, how to use the optimum Inductor Finder , if i know the Quality factor and Frequency of the VCO Thankyou Pavan
  6. P

    Maximum Allowed current in 0.18um UMC CMOS

    Please let me know the valve , in the documentation its given 625u amp , is this value correct But in some VCO designs the tail current source value is above 2mA, some papers even 7mA. Please let me know answer at the earliest
  7. P

    What's the allowed current density for 0.18um CMOS?

    Please let me know the valve , in the documentation its given 625u amp , is this value correct But in some VCO designs the tail current source value is above 2mA, some papers even 7mA. Please let me know answer at the earliest
  8. P

    how to keep the output amplitude of DIFFERENTIAL VCO CONSTANT

    I am have a differential vco using ring osc ckt when the control voltage at the tail current source is changed the amplitude changes, is there any logic which can tweak it the normal amplitude , any reference shall be very helpful

Part and Inventory Search

Back
Top