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Recent content by oscarcot

  1. O

    [SOLVED] STM32L0 really lower power than STM32L4? (ARM Cortex M0, M4)

    Sorry for the delay. Thanks a lot. Finally I found a reasonable answer to my question. 1. L4 came after L0, so they tried to equal or even improve the low power figures. That is why comparing the numbers is so misleading. 2. However, in running mode L0 can still be driven by a lower clock...
  2. O

    [SOLVED] STM32L0 really lower power than STM32L4? (ARM Cortex M0, M4)

    Hi Easyrider, I took a look to LM3S9B9 for instance and the current is at least in mA range and 30 uA for the hibernation mode. That's completely out of my budget. Could you or somebody else try to address the STM32L4/L0 question? Thanks and regards, Oscar
  3. O

    [SOLVED] STM32L0 really lower power than STM32L4? (ARM Cortex M0, M4)

    Hello people, I have read further and I still don't find a convincing reason for using L0. Anybody has some idea to share? Greetings, Oscar
  4. O

    Sampling frequency of digital low pass filter

    Hi Sabu, much clearer now, you want to keep the DC component of a signal with 50 Hz and harmonics. I guess you're actually trying to simulate a rectified power supply, like a half-way rectifier. Then take ten times the 50 Hz frequency of the power supply. Most harmonics will be dead by 500 Hz...
  5. O

    Sampling frequency of digital low pass filter

    Hello Sabu, It's true, you didn't describe your problem at all. By "filter out", I understand you want to remove DC. If that is the case, you should use a high-pass filter and not a low-pass. In that case, the sampling frequency should be at least as high as two times the signal bandwidth fs=...
  6. O

    [SOLVED] STM32L0 really lower power than STM32L4? (ARM Cortex M0, M4)

    Hello everybody, I'm choosing an ultra low power microcontroller for an application with RTC and long sleeping times. I have been looking at the numbers from the brochures and datasheets from STML4 and L0 and I can't find a reason why L0 is better in power consumption. I post some numbers from...
  7. O

    Input voltage for Rail to Rail output stage

    Hello, I have problems implementing this output stage from the Huijsing "Operational Amplifiers" book (p. 152). For my design, R1=R2=100 kOhm, Ib2=Ib1=20 µA. Technology XFAB 0.35 µm. 1. Why does it have 2 inputs? As far as I read, is not supposed to be a differential buffer. It's clear the...
  8. O

    Helping define DC-Potential of capacitive voltage divider through parasitics

    I think, either there's a magic secret to define that potential, or the problem doesn't happen at all in the real chip. Since my PR does work in silicon as expected, I have started to think this might just be a kind of convergence problem. I'm gonna check if adding the switch transistor helps...
  9. O

    Helping define DC-Potential of capacitive voltage divider through parasitics

    Thanks. First of all, I'm talking about a simulation using the analog_extracted file. By the way, the problem does not happen with the pure schematic simulation. Now, for the pseudo-resistors, I tested them on a real chip. Inside it, there is an RC low-pass filter. The C is connected to ground...
  10. O

    Helping define DC-Potential of capacitive voltage divider through parasitics

    Hello, I'm designing a Fully-Differential low noise amplifier for neural signals like the one on the next links: **broken link removed** https://www.uni-ulm.de/en/in/institute-of-microelectronics/research/topics/biomedical-implants/cmos-circuits-for-multi-channel-neural-signal-recorders.html...
  11. O

    Why telescopic has superior noise performance?

    Hi guys, please, somebody tell me, why is the telescopic amplifier supposed to have a superior noise performance compared to other amplifiers? Regarding the folded cascode, it's ok, we have more transistors producing noise. But, what about the ordinary 2-stage Miller amplifier?, or a simple...
  12. O

    Relevance of gain error in OpAmp

    Ok. Thanks. It's ok with what you told me. Cheers, Oscar
  13. O

    Relevance of gain error in OpAmp

    Thank you, ok, three remaining questions please: 1. The innacuracy is frequency dependant, right? So that means I can have 95% accuracy up to 3kHz, and around 80% up to 10kHz. Is that right? 2. Will the innacuracy be random or systematically predictable? Can it be software-compensated? 3. What...
  14. O

    Relevance of gain error in OpAmp

    Hello, I'm designing an amplifier for a fixed gain of 60dB and 10kHz bandwidth. (Just for reference, it is a Fully Differential Difference Amplifier, using XH035 CMOS-technology). The DC open-loop gain is 85dB. I read from some references that the open-loop gain needs to be at least 20dB above...
  15. O

    Mismatch responsible transistor in DDA

    Hi checkmate, I have tried around a little with your suggestions but it seems the mismatch comes from more than one variable itself. It can be, as you say, that my design operates extremely marginally. Therefore I have tried to follow the next corrections: 1. Make transistors bigger (already...
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