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If somebody gives you the simulation result it's not going to help you or solve your problem.
At the moment maybe difficult to simulate this circuit. My advice you should try to simulate simple simulation first. Then after getting little handy you try to simulate your circuit. Find some...
Hi dgnani,
1. I checked with previous version, there is no error, sicne i've alreayd submitted for fabrication of last version.
2. I think the error is not coming from source, becasue the bad subtype is directing it to layout
3. So, if i had to change rule files how should I do it?
In rule...
Hi leo_o2
It was a NMOS transistor, which was causing an error.
I went to Tools->CDF->Edit and I found the NMOS transistor and I changed cdlmodel: from ND to N2. However, the error still exits :( !
Please, correct me if i am editing cdf wrong way!
I've installed new PDK with same technology tsmc 0.13 um.
The only thing changed was MIM capacitor to lower density capacitor from "1.5fF_MIM" to "1.0fF_MIM".
When I copied the schematic and checked the Calibre LVS, the error came out is:
bad component subtype:
layout | source...
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