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verification + fifo + bfm + monitor
Thank you Ajeetha
Added after 11 minutes:
Regarding the area of scoreboard, monitor and checker. What exactly is the difference between them. Scoreboard : stores the input value (write value) .
Monitor: captures or stores the output value(read...
I am new to verification. For verification of fifo, the components required that I have identified are testbench, DUT, bus function model and scoreboard. Is there a difference between testbench and testcase? And can somebody elaborate on the Bus function model for sync fifo...
post synthesis simulation
need help in post synthesis simulation of netlist.
I am new to this area. Can somebody tell how to go about the simulation of netlist. I tried simulatiing by using ncsim but encountered error in ncelab : CUVMUR instance of design unit unresolved.
Also is there some...