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post synthesis simulation of netlist - ncsim

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netreg

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post synthesis simulation

need help in post synthesis simulation of netlist.

I am new to this area. Can somebody tell how to go about the simulation of netlist. I tried simulatiing by using ncsim but encountered error in ncelab : CUVMUR instance of design unit unresolved.

Also is there some attribute of ncsim that should be enabled or disabled and where should the library file be added?

Thanks
 

ljxpjpjljx

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ncsim zero delay

you should have netlist and sdf filf for ncsim to load !
 

    netreg

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netreg

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bit blasted ports+sdf

Thanks...I am using palladium for synthesis. Is there an sdf file generated using the palladium or is there some other compiler using which I need to generate the sdf file.
 

paulki

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post synthesis simulations

Hi netreg,
Post Synthesis Simulation or Gate Level Simulation (GLS) is a process of replacing all the RTL related files with the top level netlist with the Technology Libraries and SDF for Timing and Functionality. (SDF is only required for the Timing Simulation, for Zero Delay Simulations, SDF is not a MUST). For initial GLS, better to start with the Zero Delay (without SDF simulation).
The error which you were refering is may be due to the wrong way of netlist generation from the PT (Prime Time). For initial QC, check the instance name in the Netlist and corresponding library file (Verilog model from the Technology Vendor). If both are matching the way netlist generated is wrong.

Some useful check points are
1. check whether hierarchical or flattened netlist (If flattened different way is required to find the instance from the netlist).
2. Check the BUSES are Bit-blasted or bit-elapsed... These are the some bottle necks in the initial phases of GLS.
3. Other key points are check the non-resetable flop's output state at the simulation start (Need forcing of output at the simulation start), Initialise the Memory, and other IO ports at the start of simulation with proper force-deposit do files. Disable the errors and warning with the appropriate keyword while initial simulation bring-up.
4. Check with the back-end guy who has generated the Netlist from the same Technology Libraries they have hand-over to the Verification guy.

Check other GLS related posts in this forum for other tips

- Paul
 
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    netreg

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    bardia

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netreg

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ncsim instance unresolved

Thanks Paul...
 

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