Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Why dont you check the Instance Pin box ON in your encounter and then look at the pin connections, may be the pin is in the same layer of the wire that is why its not showing any VIA in that place
thanks
natryx
.db format are synopsys formats
and Cadence tools cannot read that format, only .lib can be read by encounter
i guess you have some tools by synopsys that can convert the .db formats to .lib formats , check with them
I'm really not able to trace out what could be the actual problem
but I remember i faced some issues like this when i was using version 5 and below, check out for the version you are using and try to upgrade it if possible
If you are still not able to see then better explore the things with the...
soc encounter-hoe to view all modules
'shift+g' to ungroup the major modules till what ever the hierarchy you need
'g' to regroup again
to explore more about the modules present in your design use the design browser that's present in the menu
If this is not answering you question, better you...
i guess some of your your design constraints are missing , what else information did u provide in the sdc, recheck it once again for transition values , uncertainities, input_delays output_delays ....
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.