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Recent content by NaneBL

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    Problem about 9k block ram in Spartan 6

    I have detected an error during testing, but I am not sure if it is a design error or an error due to the last warning. The simulation with ModelSim is correct, but when I test in Nexys 3 board, when I am filling up the FIFO, I can't write in the register "Memory(7)", it writes again in...
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    Problem about 9k block ram in Spartan 6

    Hi friend. I am programming a slave modbus device into a Spartan 6 and I get this warning in map implement: WARNING:PhysDesignRules:2410 - This design is using one or more 9K Block RAMs (RAMB8BWER). 9K Block RAM initialization data, both user defined and default, may be incorrect and...
  3. N

    help with simple code in vhdl

    Sorry, I am a fool :-P Rookie mistake. Thanks.
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    help with simple code in vhdl

    Hello to everybody. This is my first post. I am glad I found this great forum. Could you help me with this code? It is a multiplexer of four displays. I have a warning about the signal "Estado": WARNING:Xst:1710 - FF/Latch <Estado_0> (without init value) has a constant value of 0 in block...

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