Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi everyone,
Instead of cam block we are using ROM and we are storing the value and reading from it....the problem we are facing is that when clock is high it is reading all the value..we are unable to read the value at different clock meaning we are finding difficult to find...
Hi Everybody,
I have to design AER(address Event Representative protocol) in Vhdl for neural network application, I have done the code but i am not sure whether it is correct..I need everybodys help please help me.:cry: i have enclosed the paper and the code, and another thing...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
