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AER code in VHDL for the neural project

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nagesh1986

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Hi Everybody,
I have to design AER(address Event Representative protocol) in Vhdl for neural network application, I have done the code but i am not sure whether it is correct..I need everybodys help please help me.:cry: i have enclosed the paper and the code, and another thing is we are not implementing the CAM unit
 

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  • CatalunyaAERCommunicationSNN_NASA_ESA2009.pdf
    559.5 KB · Views: 93
  • code.doc
    28 KB · Views: 85

Hi everyone,
Instead of cam block we are using ROM and we are storing the value and reading from it....the problem we are facing is that when clock is high it is reading all the value..we are unable to read the value at different clock meaning we are finding difficult to find write the pgm parallel. please help me...please help me
 

Hi everyone,
can you guys tell me where i have done mistake in the code...
 

hi everyone,
please help me.....i know i dont have so much points to my account..please help me :':)'(
 

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