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Recent content by nadipineni09

  1. N

    what is automatic variable and public variable in system verilog?

    what is automatic variable and public variable in system verilog ,can anyone explain by providing perfect example in system verilog?
  2. N

    width ratios of pmos and nmos in 45nm

    how to find or assign of width and length ratios for mos transistors in 45nm especially in cadence tools suite(virtuoso)
  3. N

    how to assign width and length parameters for nmos and pmos in virtuoso tool

    how to give ramp input as vin (v2) in virtuoso tool
  4. N

    how to give ramp input in cadence

    please visit this site ,https://www.cadence.com/content/cadence-www/global/en_US/home/tools.html
  5. N

    how to give ramp input in cadence

    how to give ramp input voltage as input to nmos for differential pair .
  6. N

    how could i assign w/l ratio for pmos and nmos for 45nm in cadence virtuoso

    how will i get w/l ratio for nmos and pmos for 45nm in cadence virtuoso
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