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Recent content by mukesh1981

  1. M

    500 points for naming a new PIC Microcontroller book

    if u are new in pic micro controller project design following sites may help u **broken link removed** https://www.mikroe.com/en/books/picbook/0_Uvod.htm https://www.microchipc.com/sourcecode/ in third site u will get some free source code also
  2. M

    [SOLVED] How to tell the differece between MII & RMII interface?

    mii vs rmii MII comprised of 16 pins for data and control is defined. and frequency is 25 mhz . but RMII is 8 pin interface and a single reference clock with 50 mhz
  3. M

    [Q] Gigabit Ethernet RJ45

    ur question is not clear !? u want rj45 connector for gigabits Ethernet card or some thing else
  4. M

    what's the difference between firmware and operating system

    irmware is the programming that is embedded on a chip in the device and which controls that device whereas software is the programming that provides functionality over that which is provided by the firmware.
  5. M

    how to know those GCLK pin name?(new to FPGA)

    Hi to know which pin is using for GCLK u have to read the data sheet of the specific FPGA , there they will clearly mention pin details .if u want I can provide u for that just tell me which FPGA u are using .
  6. M

    Why latches are not preferred in any design?

    Latch -reg. Hi Latch is more sensitive to noise means that whenever there is change in the input output will change; that will give race condition in the output.
  7. M

    How to delay the input by two clock cycles?

    hi Just use double flopping nothing but two flip flops in serial, that output will be two clock cycles delayed with respect to input.
  8. M

    Help me make a glitch free reset logic

    Glitch Free Reset Hi In this case only less than one clock cycle glitch u can remove. If u want capture reset signal which is high more than one clock cycle ,for that u have to use frequency divider . Use this frequency for the synchronization u can further remove glitch on the reset signal.
  9. M

    why is this for loop not synthesizable

    for i in I_b'RANGE LOOP O_g_tmp(i - 1) <= I_b(i) XOR I_b(i - 1); end loop; If u want range attribute this is the correct syntax, for range attribute no need to write down to. It will take range according your bit vector.

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