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Recent content by Mudasir Mir

  1. M

    common centroid in layout design

    Common centriod technique is not limited to current mirrors or differential pair circuits. One can split a large transistor into possible equal parts and use this technique. One can help if you provide a snap shot of your circuit. It also depends on individual, which group of transistors he/she...
  2. M

    common centroid in layout design

    Common centriod is one of the layout strategies to mitigate the effect of parasitics. This technique helps in cancelling the effect of parasitics. Consider this example: If we have no. of negatives equal to no. of positives, overall effect will be null. Similarly if you can allign transistors...
  3. M

    How to determine the range of inputs for which cmos devices remain in saturation

    One way is to use the concept of ICMR , & the other procedure is by using the tool (cadence) Following are the steps for doing that : 1. Make a gedit file with name "saveops.scs" and mention different transistors M1, M2, M3 etc in that file with the syntax, SAVE OPPOINT MX; where X is...
  4. M

    [SOLVED] LVS error in Cadence IC616

    Dear Sir, i checked this, but still not working...ok I tried to workout a simple inverter..but it the above mentioned error is still coming...I am attaching screenshot of layout ... Please look into it.. Thanks!!!
  5. M

    [SOLVED] LVS error in Cadence IC616

    While doing LVS for my circuit I am getting following errors....Can anyone tell me what are these??? 1. ptap must be connected because of same Net/diffNet 2. 'nsd' must be connected because of sameNet/diffNet Thanks!!!
  6. M

    difference between dpsk, psk

    Differential phase shift keying is a non coherent form of phase shift keying which avoids the need for a coherent reference signal at the receiver. Further PSK needs coherent detection due to its phase shift with a refrence signal. you should keep in mind that no coherent receivers are easy and...

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