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Recent content by mohan_ece

  1. M

    [Moved]: netlist for a CMOS full adder with monte carlo analysis comment

    please provide a netlist for full adder simulation with monte carlo analysis i am using 120 nm model. i want to do threshold voltage variation how can we come to know allowable variation for a particular technology say 120 nm thank you
  2. M

    design of rf power amplifier

    what is 1 db compresion point in rf power amplifier
  3. M

    why power adde efficiency of rf power amplifier decreases when the output power rises

    in the design of rf power amplifier,power added efficiency is directly proportional to the ouput power then why power added efficiency decreases when increase in out power magnitude?
  4. M

    how can we know about cadence tools,is any web suggest me to design CMOS PA

    I m new to cadence tools..so please provide any material to learn about completely..i m concentrating on CMOS RF PA schematic
  5. M

    can anyone say mean of backoff,compressed gain and books to know indetail of CMOS PA

    Please provide necessary information as soon as possible
  6. M

    vhdl code for array multiplier

    need vhdl code for 4x4 array multiplier. soon plz.
  7. M

    vhdl code for real time clock

    i need vhdl code for real time clock. plz send soon very urgent.
  8. M

    vhdl code for frequcency divider

    i need a vhdl code for frequency divider.. If possible plz send the digital circuit details. waiting for urs reply.
  9. M

    coding for T flip flop - error on q_s is not systhesisale on

    coding for T flip flop here i write code for t flip flop While synthesising it shows error on q_s is not systhesisale one.. i dont know wat to do to correct it. i hope someone clarify it .. need it soon plz. entity tflipflop is Port ( t : in STD_LOGIC; reset,clk : in...
  10. M

    vhdl code for 1 bit full adder

    vhdl code forfull adder Hi can anybody give the idea for desining a 1-bit full adder of behavioral modeelling using case/if ststements
  11. M

    What is difference between mod and REM operators?

    hi i have one doubt regarding VHDL MOD OPERATORS. What is difference between mod and REM operators.. both are doing same operation .. i cant get.. anybody suggest the example for shifting operation.. for example i have two inputs a, b; i want to shift left two times for variable a.. the...
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