Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I'm interested in designing an ASIC for a wireless data acquisition system that will operate at 5.8Ghz. I'm not sure how to determine which process to use for this design. Could someone suggest a few processes that would be a good choice for this design. I've read a couple of papers on 5.8Ghz...
Hi all,
I need to design a 6Ghz VCO. In a post on this board last year there was a question about designing a 5Ghz VCO. The link to that discussion is
<>
One response from board member "DJ" was as follows:
"Simple. Use BJT 681000 (of Nec)or its package or 420000 (Of @gilent).
Load the...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
