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I have used the structure shown in the picture in "reply.doc". Practically It is a sequence of substractors. I got it from my Professor. This structure as it is can be used only for
unsigned integers but I have written VHDL code to adapt it on IEEE 754 Format. In fact this structure implements...
I have written VHDL code for a devider for two floating point numbers using the IEEE 754 floating point format. Would it be useful for you to send it to you?
Re: Xilinx or Altera
Everything I think depends on the software you have in your hands. Xilinx has better simulation tools to check your dessign and also better documentation in ISE Foundation Series software than Altera.I found it useful trying to simulate a DCT module for JPEG comression.
des vhdl
Hello people all around the World. I am a beginner in FPGA design and l'm looking for
a free ip related to DES encryption to start practicing. It is not nessesarry that it works well in synthesis. I need it just for practice. I found nothing in www.free-ip.com.
Thank you in advance!
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